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Bayesian model fusion: Enabling test cost reduction of analog/RF circuits via wafer-level spatial variation modeling.
Shanghang Zhang
Xin Li
Ronald D. Blanton
José Machado da Silva
John M. Carulli Jr.
Kenneth M. Butler
Published in:
ITC (2014)
Keyphrases
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bayesian model
cost reduction
bayesian framework
bayesian inference
conditional probabilities
posterior distribution
cost savings
machine learning
floating gate
decision making
lead time
multi task learning