Process-insensitive low-power design of switched-capacitor integrators.
Ravindranath NaiknawareTerri S. FiezPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2004)
Keyphrases
- low power
- single chip
- low cost
- power consumption
- logic circuits
- design process
- high speed
- vlsi architecture
- low power consumption
- digital signal processing
- power dissipation
- high power
- mixed signal
- ultra low power
- gate array
- cmos technology
- power reduction
- design methodology
- wireless transmission
- nm technology
- file system
- image processing