A 4.7mW 0.32mm2 10b 30MS/s Pipelined ADC Without a Front-End S/H in 90nm CMOS.
Young-Deuk JeonSeung-Chul LeeKwi-Dong KimJong-Kee KwonJongdae KimPublished in: ISSCC (2007)
Keyphrases
- power consumption
- nm technology
- power supply
- hd video
- cmos technology
- low power
- analog to digital converter
- silicon on insulator
- back end
- high definition
- single chip
- metal oxide semiconductor
- rms error
- power dissipation
- average error
- power management
- data flow
- low voltage
- analog vlsi
- video transmission
- cross section
- high speed
- real time
- clinical setting
- low cost
- circuit design
- sigma delta
- wide dynamic range