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A Tool for Injecting SEU-Like Faults into the Configuration Control Mechanism of Xilinx Virtex FPGAs.

Monica AlderighiFabio CasiniSergio D'AngeloMarcello ManciniA. MarmoSandro PastoreGiacomo R. Sechi
Published in: DFT (2003)
Keyphrases
  • field programmable gate array
  • hardware implementation
  • xilinx virtex
  • fault detection
  • pattern recognition
  • fault diagnosis
  • embedded systems
  • machine learning
  • power consumption