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Internal voltage generator for low voltage, quarter-micrometer flash memories.
Takayuki Kawahara
Syun-ichi Saeki
Yusuke Jyouno
Naoki Miyamoto
Takashi Kobayashi
Katsutaka Kimura
Published in:
IEEE J. Solid State Circuits (1998)
Keyphrases
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low voltage
design considerations
power line
cmos technology
power management
image sequences
design process