A Hierarchical DFT Architecture for Chip, Board and System Test/Debug.

Published in: ITC (2004)

Keyphrases

hierarchical architecture
analog vlsi
vlsi implementation
high speed
frequency domain
management system
low cost
software architecture
real time
host computer
hierarchical structure
multi layer
cmos image sensor
single chip
circuit design
high density
fourier transform
image compression
denoising