Low-power Clock Reference Circuit for Intermittent Operation of Subthreshold LSIs.
Ken UenoTetsuya AsaiYoshihito AmemiyaPublished in: ISCAS (2009)
Keyphrases
- low power
- high speed
- power consumption
- logic circuits
- cmos technology
- power reduction
- focal plane
- low voltage
- power dissipation
- gate array
- single chip
- vlsi circuits
- delay insensitive
- high power
- digital signal processing
- low cost
- low power consumption
- real time
- wireless transmission
- mixed signal
- vlsi architecture
- nm technology
- image sensor
- energy saving
- power saving
- general purpose
- power management