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A 28-nm FD-SOI 8T Dual-Port SRAM for Low-Energy Image Processor With Selective Sourceline Drive Scheme.

Haruki MoriTomoki NakagawaYuki KitaharaYuta KawamotoKenta TakagiShusuke YoshimotoShintaro IzumiHiroshi KawaguchiMasahiko Yoshimoto
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2019)
Keyphrases
  • low energy
  • real time
  • three dimensional
  • data collection
  • parallel processing
  • dynamic random access memory