Power consumption advantage of a dynamic optically reconfigurable gate array.

Minoru Watanabe Fuminori Kobayashi

Published in: IPDPS (2006)

Keyphrases

power consumption
low power
gate array
power reduction
low cost
energy efficiency
power management
power saving
battery life
energy saving
low power consumption
battery powered
logic circuits
energy management
clock gating
nm technology
data center
high speed
image sensor