Design Flow for Hybrid CMOS/Memristor Systems - Part II: Circuit Schematics and Layout.
Sachin MaheshwariSpyros StathopoulosJiaqi WangAlexander SerbYihan PanAndrea MifsudLieuwe B. LeeneJiawei ShenChristos PapavassiliouTimothy G. ConstandinouThemistoklis ProdromakisPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2021)
Keyphrases
- circuit design
- high speed
- digital circuits
- layout design
- chip design
- analog vlsi
- electronic circuits
- cmos technology
- low cost
- design methodology
- power dissipation
- quantum mechanics
- logic circuits
- single chip
- low power
- resource allocation
- analog circuits
- design process
- computational intelligence
- artificial intelligence