A Split-Load Interpolation-Amplifier-Array 300MS/s 8b Subranging ADC in 90nm CMOS.
Yasuhide ShimizuShigemitsu MurayamaKohhei KudohHiroaki YatsudaPublished in: ISSCC (2008)
Keyphrases
- wide dynamic range
- dynamic range
- low power
- cmos technology
- image sensor
- power reduction
- focal plane
- low voltage
- analog to digital converter
- power consumption
- high speed
- high dynamic range
- low cost
- nm technology
- infrared
- liquid crystal
- charge coupled device
- cmos image sensor
- metal oxide semiconductor
- single chip
- load balancing
- spatially varying
- interpolation method
- image interpolation
- video camera
- high power
- interpolation methods
- real time
- silicon on insulator
- power management
- linear interpolation
- color filter array
- image processing algorithms
- transfer function
- frame rate
- signal to noise ratio
- multiple sclerosis
- mixed signal
- transmission electron microscopy
- digital signal processing