Design-for-Test of Asynchronous Networks-on-Chip.

Xuan-Tu Tran Vincent Beroulle Jean Durupt Chantal Robach François Bertrand

Published in: DDECS (2006)

Keyphrases

network design
single chip
low cost
circuit design
built in self test
neural network
social networks
complex networks
design principles
engineering design
design methodology
physical design
high bandwidth
vlsi implementation