Co-Optimization of SRAM Circuits with Sequential Access Patterns in a 7nm SoC Achieving 58% Memory Energy Reduction for AR Applications.
Daniel H. MorrisHuichu LiuTony F. WuH. Ekin SumbulElnaz AnsariAlexandre BarachantJonathan ReidEdith BeignéPublished in: VLSI Technology and Circuits (2022)