A preamplifier circuit with offset-voltage control technique for 50-Gb/s CMOS PAM4 receiver.
Masaya MiyabeToshiyuki InoueMasataka InoueShinya NakashioyaAkira TsuchiyaKeiji KishinePublished in: ICEIC (2022)
Keyphrases
- high speed
- low voltage
- circuit design
- analog vlsi
- power supply
- control method
- dc dc converter
- data acquisition
- low cost
- duty cycle
- delay insensitive
- low power
- power system
- single phase
- control system
- power consumption
- intelligent control
- design considerations
- digital circuits
- cmos technology
- reactive power
- control strategy
- high voltage
- output voltage
- short circuit