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Design of a single layer programmable Structured ASIC library.

Thomas C. P. ChauDavid W. L. WuYanqing AiBrian P. W. ChanSam M. H. HoOscar K. L. LauSteve C. L. YuenKong-Pang PunOliver C. S. ChoyPhilip Heng Wai Leong
Published in: DDECS (2010)
Keyphrases
  • single layer
  • single chip
  • neural network
  • multiple layers
  • multi layer