11.4 A 1.5mW 68dB SNDR 80MS/s 2× interleaved SAR-assisted pipelined ADC in 28nm CMOS.
Frank M. L. van der GoesChristopher M. WardSantosh AstgimathHan YanJeff RileyJan MulderSijia WangKlaas BultPublished in: ISSCC (2014)
Keyphrases
- power consumption
- nm technology
- power supply
- hd video
- cmos technology
- low power
- synthetic aperture radar
- analog to digital converter
- silicon on insulator
- sar images
- high definition
- single chip
- high speed
- metal oxide semiconductor
- power dissipation
- power management
- low cost
- database
- sar imagery
- image reconstruction
- analog vlsi
- wide dynamic range
- linear array
- hardware and software
- delay insensitive
- video transmission
- low voltage
- data flow
- power plant