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Single-Ended Boost-Less (SE-BL) 7T Process Tolerant SRAM Design in Sub-threshold Regime for Ultra-Low-Power Applications.
C. B. Kushwah
Santosh Kumar Vishvakarma
Devesh Dwivedi
Published in:
Circuits Syst. Signal Process. (2016)
Keyphrases
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design process
ultra low power
conceptual model
low power
data sets
neural network
information systems
user interface
knowledge based systems
building blocks
process model
design patterns
design methodology
diffusion process
single chip