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Variable-latency adder (VL-adder): new arithmetic circuit design practice to overcome NBTI.
Yiran Chen
Hai Li
Jing Li
Cheng-Kok Koh
Published in:
ISLPED (2007)
Keyphrases
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circuit design
data flow
digital circuits
logic circuits
database
design automation
data sets
genetic algorithm
bayesian networks
expert systems
arithmetic operations