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Methodology for extracting the characteristic capacitances of a power MOSFET transistor, using conventional on-wafer testing techniques.
Christoph Kerner
Ivan Ciofi
Thomas Chiarella
Stefaan Van Huylenbroeck
Published in:
ESSDERC (2012)
Keyphrases
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integrated circuit
power consumption
high speed
low power
semiconductor manufacturing
real time
databases
information systems
steady state
conceptual framework
software testing
power dissipation
power distribution