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9.92psrms low tracking jitter pixel clock generator with a divider initializer and a nearest phase selector in 28nm CMOS technology.
Kangyeop Choo
Sung-Jin Kim
Wooseok Kim
Jihyun F. Kim
Taeik Kim
Hojin Park
Published in:
CICC (2014)
Keyphrases
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cmos technology
spl times
power consumption
low power
image sensor
high speed
low voltage
silicon on insulator
parallel processing
real time
power dissipation
particle filter
power management
low cost
mixed signal
motion segmentation
digital images
clock frequency
appearance model