A thread-level parallelization of pairwise additive potential and force calculations suitable for current many-core architectures.
Yoshimichi AndohSoichiro SuzukiSatoshi OhshimaTatsuya SakashitaMasao OginoTakahiro KatagiriNoriyuki YoshiiSusumu OkazakiPublished in: J. Supercomput. (2018)