Simplifying design and verification for structural hazards and datapaths in pipelined circuits.

Jason T. Higgins Mark D. Aagaard

Published in: HLDVT (2004)

Keyphrases

design process
computer aided
formal verification
design decisions
asynchronous circuits
case study
engineering design
delay insensitive
real time
digital circuits
design considerations
optimal design
data flow
design principles
structural information
information systems
learning algorithm