Login / Signup

A Power-Efficient 5.6-GHz Process-Compensated CMOS Frequency Divider.

Ivan Siu-Chuang LuNeil WesteSri Parameswaran
Published in: IEEE Trans. Circuits Syst. II Express Briefs (2007)
Keyphrases
  • high speed
  • power consumption
  • computationally expensive
  • data mining
  • computationally efficient
  • real time
  • data sets
  • design process
  • analog vlsi