A new low-power turbo decoder using HDA-DHDD stopping iteration.
Wen-Ta LeeSan-Ho LinChia-Chun TsaiTrong-Yen LeeYuh-Shyan HwangPublished in: ISCAS (2) (2005)
Keyphrases
- low power
- turbo codes
- high speed
- power consumption
- low cost
- high power
- single chip
- error correction
- distributed video coding
- wireless transmission
- channel coding
- low power consumption
- error concealment
- low complexity
- compressed images
- vlsi circuits
- vlsi architecture
- digital signal processing
- logic circuits
- low density parity check
- error resilience
- video codec
- visual quality
- real time
- ldpc codes
- mixed signal
- computer simulation
- image sensor