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at 90% efficiency using deep-trench capacitors in 32nm SOI CMOS.

Toke Meyer AndersenFlorian KrismerJohann W. KolarThomas ToiflChristian MenolfiLukas KullThomas MorfMarcel A. KosselMatthias BraendliPeter BuchmannPier Andrea Francese
Published in: ISSCC (2014)
Keyphrases
  • circuit design
  • silicon on insulator
  • data sets
  • computational efficiency
  • integrated circuit
  • deep learning
  • database
  • neural network
  • artificial neural networks
  • high speed
  • cmos technology