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An all-digital phase-locked loop for high-speed clock generation.

Ching-Che ChungChen-Yi Lee
Published in: IEEE J. Solid State Circuits (2003)
Keyphrases
  • high speed
  • phase locked loop
  • low power
  • high voltage
  • multipath
  • real time
  • high speed networks
  • image processing
  • multiresolution
  • frame rate
  • generation process
  • case study
  • power consumption