A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic.
Vijaya LakshmiJohn ReubenVikramkumar PudiPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2022)
Keyphrases
- memory management
- hardware implementation
- computing power
- associative memory
- embedded dram
- random access memory
- reasoning engine
- hash table
- hardware architecture
- modal logic
- processing elements
- real time
- neural network
- memory hierarchy
- management system
- logic programming
- hierarchical structure
- tree structures
- memory requirements
- b tree
- logical framework
- index structure
- memory access
- proof theory
- memory usage
- floating point