Low-Power Time Deinterleaver for ISDB-T Receiver.

Hyeong-Ju Kang Byung-Do Yang

Published in: IEEE Trans. Circuits Syst. II Express Briefs (2012)

Keyphrases

low power
high speed
power consumption
low cost
single chip
high power
vlsi architecture
digital signal processing
logic circuits
wireless transmission
vlsi circuits
low power consumption
cmos technology
mixed signal
gate array
image sensor
power reduction
signal processor