The Design and Implementation of Scalable Deep Neural Network Accelerator Cores.
Ryuichi SakamotoRyo TakataJun IshiiMasaaki KondoHiroshi NakamuraTetsui OhkuboTakuya KojimaHideharu AmanoPublished in: MCSoC (2017)
Keyphrases
- neural network
- high level synthesis
- implementation issues
- design methodology
- design process
- efficient implementation
- pattern recognition
- artificial neural networks
- hardware architecture
- design considerations
- parallel implementation
- engineering design
- mapreduce framework
- core components
- design decisions
- real time
- software engineering
- user interface
- genetic algorithm
- data sets