Low-Power Null Convention Logic Multiplier Design Based On Gate Diffusion Input Technique.
Prashanthi MetkuKyung Ki KimYong-Bin KimMinsu ChoiPublished in: ISOCC (2018)
Keyphrases
- low power
- logic circuits
- cmos technology
- single chip
- power consumption
- low cost
- high speed
- low power consumption
- vlsi architecture
- digital signal processing
- power dissipation
- nm technology
- gate array
- mixed signal
- delay insensitive
- digital circuits
- embedded systems
- design process
- wireless transmission
- vlsi circuits
- imaging systems
- power reduction