Cells reconfiguration around defects in CMOS/nanofabric circuits using simulated evolution heuristic.
Abdalrahman M. ArafehSadiq M. SaitPublished in: ISQED (2015)
Keyphrases
- analog vlsi
- delay insensitive
- high speed
- circuit design
- vlsi circuits
- cmos technology
- low power
- low cost
- search algorithm
- chip design
- power dissipation
- optimal solution
- floating gate
- power consumption
- digital circuits
- logic circuits
- simulation model
- defect detection
- manufacturing systems
- tabu search
- power supply
- focal plane
- low voltage
- combinatorial optimization
- genetic algorithm