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A novel counter-based low complexity inner-product architecture for high speed inputs.
Manas Ranjan Meher
Ching-Chuen Jong
Chip-Hong Chang
Jeremy Yung Shern Low
Published in:
ISCAS (2010)
Keyphrases
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low complexity
high speed
vlsi architecture
low power
motion estimation
video encoding
high data rate
real time
computational complexity
distributed video coding
bit plane
wireless video
multiple description coding
video streaming
lower complexity
mimo systems
video sequences
image sequences