A Reconfigurable Ray-Tracing Multi-Processor SoC with Hardware Replication-Aware Instruction Set Extension.
Alexandre Solon NeryNadia NedjahFelipe M. G. FrançaLech JózwiakHenk CorporaalPublished in: ICA3PP (1) (2013)
Keyphrases
- instruction set
- ray tracing
- multi processor
- embedded systems
- low cost
- image synthesis
- field programmable gate array
- shared memory
- multi core processors
- floating point
- program execution
- memory access
- computer architecture
- application specific
- hardware implementation
- fault tolerant
- distributed memory
- fault tolerance
- real time
- energy function
- message passing
- computer systems
- efficient implementation
- parallel algorithm
- distributed systems