Design of low-power quaternary CMOS logic circuits.
Chotei ZukeranChushin AfusoMichitaka KameyamaTatsuo HiguchiPublished in: Systems and Computers in Japan (1986)
Keyphrases
- low power
- logic circuits
- power consumption
- low cost
- single chip
- high speed
- gate array
- power dissipation
- functional decomposition
- low power consumption
- cmos technology
- vlsi architecture
- logic synthesis
- high power
- digital signal processing
- mixed signal
- tunnel diode
- ultra low power
- power reduction
- vlsi circuits
- nm technology
- real time
- circuit design
- cmos image sensor
- digital camera