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Leakage power reduction for coarse-grained dynamically reconfigurable processor arrays using Dual Vt cells.
Keiichiro Hirai
Masaru Kato
Yoshiki Saito
Hideharu Amano
Published in:
FPT (2009)
Keyphrases
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coarse grained
power reduction
multithreading
fine grained
multi threaded
power consumption
multi core processors
protein sequences
high level
low power
power saving
access control
shared memory
real time
query processing
high speed