A 16-Bit 100 to 160 MS/s SiGe BiCMOS Pipelined ADC With 100 dBFS SFDR.

Robert Payne Marco Corsi David Smith Tien-Ling Hsieh Scott Kaylor

Published in: IEEE J. Solid State Circuits (2010)

Keyphrases

analog to digital converter
mixed signal
low power
multi channel
digital circuits
cmos technology
power consumption
low cost
high speed
data flow
low voltage
real time
pac man
thin film
database
single chip
multi layer
linear array
databases
data sets
instruction set architecture