An energy efficient non-uniform Last Level Cache Architecture in 3D chip-multiprocessors.
Pooneh SafayenikooArghavan AsadMahmood FathyFarah MohammadiPublished in: ISQED (2017)
Keyphrases
- multithreading
- coarse grained
- highly efficient
- memory access
- memory subsystem
- parallel computing
- analog vlsi
- sensor networks
- computational power
- wireless sensor networks
- low cost
- high speed
- data access
- management system
- shared memory
- distributed memory
- parallel architecture
- shared memory multiprocessors
- real time
- vlsi implementation
- memory hierarchy
- single chip
- energy efficient
- prefetching
- energy consumption
- query processing