Pooneh Safayenikoo

Publication Activity (10 Years)

Years Active: 2016-2023
Publications (10 Years): 10

Top Topics

Parallel Architecture

Top Venues

Publications

Yiwei Yang, Pooneh Safayenikoo, Jiacheng Ma, Tanvir Ahmed Khan, Andrew Quinn
CXLMemSim: A pure software simulated CXL.mem for performance characterization. CoRR (2023)
Pooneh Safayenikoo, Arghavan Asad, Mahmood Fathy
Energy-efficient Non Uniform Last Level Caches for Chip-multiprocessors Based on Compression. CoRR (2022)
Pooneh Safayenikoo, Ismail Akturk
Weight Update Skipping: Reducing Training Time for Artificial Neural Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. 11 (4) (2021)
Pooneh Safayenikoo, Ismail Akturk
Weight Update Skipping: Reducing Training Time for Artificial Neural Networks. CoRR (2020)
Pooneh Safayenikoo, Arghavan Asad, Farah Mohammadi
An Energy-Efficient Cache Architecture for Chip-Multiprocessors Based on Non-Uniformity Accesses. CCECE (2018)
Pooneh Safayenikoo, Arghavan Asad, Mahmood Fathy, Farah Mohammadi
NIZCache: Energy-efficient Non-uniform Cache Architecture for Chip-multiprocessors Based on Invalid and Zero Lines. ISCAS (2018)
Pooneh Safayenikoo, Arghavan Asad, Mahmood Fathy, Farah Mohammadi
An energy efficient non-uniform Last Level Cache Architecture in 3D chip-multiprocessors. ISQED (2017)
Pooneh Safayenikoo, Arghavan Asad, Mahmood Fathy, Farah Mohammadi
Exploiting non-uniformity of write accesses for designing a high-endurance hybrid Last Level Cache in 3D CMPs. CCECE (2017)
Pooneh Safayenikoo, Arghavan Asad, Mahmood Fathy, Farah Mohammadi
A new traffic compression method for end-to-end memory accesses in 3D chip-multiprocessors. CCECE (2017)
Pooneh Safayenikoo, Arghavan Asad, Kaamran Raahemifar, Mahmood Fathy
UCA: An Energy-efficient Hybrid Uncore Architecture in 3D Chip-Multiprocessors to minimize crosstalk. NoCArc@MICRO (2016)