A Tree-Based Checkpointing Architecture for the Dependability of FPGA Computing.
Hoang Gia VuShinya Takamaeda-YamazakiTakashi NakadaYasuhiko NakashimaPublished in: IEICE Trans. Inf. Syst. (2018)
Keyphrases
- hardware architecture
- real time
- hardware implementation
- software implementation
- hardware design
- dedicated hardware
- management system
- distributed databases
- hardware architectures
- ambient intelligence
- field programmable gate array
- systolic array
- fpga technology
- fpga implementation
- pipelined architecture
- parallel architecture
- high speed
- distributed database systems
- fault tolerance
- fpga device
- single chip
- level parallelism
- failure recovery
- low overhead
- data flow
- software architecture
- data acquisition
- data model