A 0.8 V CMOS TSPC adiabatic DCVS logic circuit with the bootstrap technique for low-power VLSI.
Hung-Pin ChenJames B. KuoPublished in: ICECS (2004)
Keyphrases
- low power
- logic circuits
- power dissipation
- high speed
- gate array
- chip design
- delay insensitive
- vlsi circuits
- power consumption
- single chip
- cmos technology
- low cost
- vlsi architecture
- mixed signal
- flip flops
- logic synthesis
- high power
- power reduction
- wireless transmission
- ultra low power
- digital signal processing
- low power consumption
- digital circuits
- cmos image sensor
- nm technology
- signal processor
- image sensor
- power saving
- power management
- low voltage
- video sequences
- hardware and software
- wireless communication
- signal processing