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Exploration of FPGA architectures for tight coupled accelerators in a 22nm FDSOI technology.
Heiner Bauer
Sebastian Höppner
Johannes Partzsch
Dennis Walter
Christian Mayr
Florian Schraut
Holger Eisenreich
Published in:
NORCAS (2017)
Keyphrases
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field programmable gate array
single chip
data processing
lower bound
rapid development
key technologies
case study
low cost
cost effective
upper bound
heterogeneous platforms
data acquisition
hardware implementation
worst case
systolic array
nm technology
silicon on insulator