Closed-Form Bounds for Interconnect-Aware Minimum-Delay Gate Sizing.

Giorgos Dimitrakopoulos Dimitris Nikolos

Published in: PATMOS (2005)

Keyphrases

closed form
closed form expressions
power dissipation
upper bound
high speed
iterative procedure
lower bound
cmos technology
power consumption
lower and upper bounds
closed form solutions
point correspondences
exponential family
objective function
transformation parameters
variational inference