A memory mapping approach for network and controller optimization in parallel interleaver architectures.
Aroua BrikiCyrille ChavetPhilippe CoussyPublished in: ACM Great Lakes Symposium on VLSI (2013)
Keyphrases
- interconnection networks
- multi core processors
- optimization algorithm
- memory requirements
- communication networks
- state information
- network structure
- error correction
- neural network
- distribution network
- parallel implementation
- optimal control
- parallel processing
- computer networks
- optimization method
- real time
- closed loop
- adaptive control
- peer to peer
- optimization problems
- networked control systems
- level parallelism