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Chip-Level RAID with Flexible Stripe Size and Parity Placement for Enhanced SSD Reliability.
Jaeho Kim
Eunjae Lee
Jongmoo Choi
Donghee Lee
Sam H. Noh
Published in:
IEEE Trans. Computers (2016)
Keyphrases
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lightweight
low cost
high speed
higher level
memory requirements
database
learning algorithm
image processing
computational complexity
evolutionary algorithm
high density
reliability analysis
modular design
analog vlsi
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