Design and Implementation of a Parallel Image Processor Chip for a SIMD Array Processor.
Myung Hoon SunwooSoohwan OngByungdug AhnKyungwoo LeePublished in: ASAP (1995)
Keyphrases
- array processor
- scan line
- single chip
- mesh connected
- parallel processing
- single instruction multiple data
- parallel implementation
- biologically motivated
- computer architecture
- chip design
- semantic network
- functional verification
- input image
- image features
- processor array
- image segmentation
- dynamic programming
- coarse to fine
- image content
- ibm power processor
- image retrieval
- image processing tasks
- multiscale
- distributed memory
- low cost
- parallel algorithm
- micron cmos
- cmos technology
- parallel architecture
- instruction set
- parallel computers
- median filtering
- image processing algorithms
- post processing
- image representation