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VERILOR: A Verilog-A Model of Lorentzian Spectra for Simulating Trap-related Noise in CMOS Circuits.

Angeliki TataridouGérard GhibaudoChristoforos G. Theodorou
Published in: ESSDERC (2021)
Keyphrases
  • high level
  • mathematical model
  • high speed
  • objective function
  • probabilistic model
  • delay insensitive
  • formal model