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Reduced Complementary Dynamic and Differential Logic: A CMOS Logic Style for DPA-Resistant Secure IC Design.
Srividhya Rammohan
Vijay Sundaresan
Ranga Vemuri
Published in:
VLSI Design (2008)
Keyphrases
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chip design
logic synthesis
logic programming
delay insensitive
classical logic
modal logic
circuit design
digital circuits
case study
multi valued
privacy preserving
proof theory
asynchronous circuits
logic circuits
flip flops
automated reasoning
power consumption
design process
low cost
user interface