A new analytical/iterative approach to statistical delay characterization of cmos digital combinational circuits.
Syed A. AftabM. A. StyblinskiPublished in: Int. J. Circuit Theory Appl. (1995)
Keyphrases
- circuit design
- power dissipation
- mixed signal
- analog vlsi
- logic circuits
- low power
- delay insensitive
- high speed
- vlsi circuits
- power consumption
- cmos technology
- asynchronous circuits
- data driven
- information theoretic
- statistical analysis
- image processing
- floating gate
- statistical models
- multi channel
- digital circuits
- analog circuits
- chip design