Circuits for CMOS High-Speed I/O in Sub-100 nm Technologies.
Hirotaka TamuraMasaya KibuneHisakatsu YamaguchiKouichi KandaKohtaroh GotohHideki IshidaJunji OgawaPublished in: IEICE Trans. Electron. (2006)
Keyphrases
- high speed
- low power
- cmos technology
- input output
- delay insensitive
- focal plane
- real time
- frame rate
- metal oxide
- low cost
- power consumption
- analog vlsi
- power reduction
- data mining
- vlsi circuits
- circuit design
- data structure
- logic circuits
- mixed signal
- image sensor
- database management systems
- gigabit ethernet
- direct memory access