Muffin: Minimally-Buffered Zero-Delay Power-Gating Technique in On-Chip Routers.
Hossein FarrokhbakhtHadi Mardani KamaliNatalie D. Enright JergerPublished in: ISLPED (2019)
Keyphrases
- power dissipation
- high speed
- power consumption
- ibm power processor
- low power
- low cost
- load balancing
- buffer size
- end to end
- chip design
- high density
- cmos technology
- multithreading
- functional verification
- end to end delay
- real time
- clock frequency
- analog vlsi
- digital signal processing
- vlsi implementation
- high bandwidth
- memory subsystem
- circuit design
- phase locked loop